EPSRC: ISCF Digital Security by Design Research Projects

03/10/2019

07/01/2020

EPSRC, on behalf of the Industrial Strategy Challenge Fund (ISCF), would like to commit up to £8 million (at 80% FEC) to support academic research projects from across the broader research landscape that address specific objectives within the scope of the Digital Security by Design challenge. The aim is to support innovative research projects that will help to move the technology beyond the state of the art, moving Capability Hardware concepts and use forward, without duplicating or conflicting with the existing CHERI research. Up to £8M is available, to be allocated across the three objectives. It is anticipated that 6 - 9 projects will be funded in total. These are expected to have a duration of between 3 and 4 years (with project end dates no later than 31 March 2024).

Leveraging the Capability Hardware concepts and approaches investigated by the CHERI program (led by the University of Cambridge), a consortium led by Arm is investigating a prototype silicon-based solution based on Arm AArch64 architecture. This prototype solution will be made openly available to academics and businesses across the UK, so as to provide early access, evaluation, and the opportunity to feed back on the proposed major change to the instruction set architecture of a processor, while investigating the broader impact to various aspects of computer science and ICT in general. Applications are invited for proposals that meet one of the following objectives only: 1) Capability enabled hardware proof and software verification; 2) Impact on system software and libraries; 3) Future implications of Capability Hardware.

Applications for full proposals are sought from project teams based at Research Organisations in the UK who are eligible to receive EPSRC funding